1. The Field of the Invention
The present invention relates generally to an improvement in the ability of test systems to test bit processing capacities of optoelectronic transceivers, and in particular an improvement in their ability to test the jitter tolerance and signal attenuation tolerance (sensitivity) of an optoelectronic transceiver.
2. The Relevant Technology
A bit error rate, also known as a bit error ratio (BER), is a ratio of bits received, processed, and/or transmitted with errors to a total number of bits received, processed, and/or transmitted over a given period of time. A BER is typically expressed as ten to a negative power. If, for example, a transmission has 1 million bits and one of these bits is in error (e.g., a bit is in a first logic state instead of a second logic state), the transmission has a BER of 10−6. The BER is useful because it provides one measurement of the ability of a device to receive, process, and/or transmit bits.
Many devices are designed to receive, process, and then transmit a plurality of bits. An optoelectronic transceiver, for example, receives a plurality of bits in an electrical form and then transforms and transmits the bits in an optical form and/or receives a plurality of bits in an optical form and then transforms and transmits the bits in an electrical form.
To derive a BER for a device under test (DUT), bits transmitted to the DUT are compared to corresponding bits transmitted by the DUT or to corresponding bits in a pattern used to generate the bits transmitted to the DUT. In some applications, the BER of a DUT must be below a defined threshold for the DUT to pass a test.
A Bit Error Rate Test or Tester (“BERT”) is a procedure or device that establishes a BER for a DUT or to otherwise quantify a DUT's ability to receive, process, and/or transmit bits. More specifically, a BERT measures the BER of a transmission (e.g., bits transmitted, received, or processed) over a given period of time by a DUT. An exemplary BERT includes, among other components, a serializer/deserializer (“SERDES”) and a clock source fixed to a host board, such as a printed circuit board (PCB), etc. Typically, the SERDES produces serial encoded data (e.g., the bits) used to establish a BER for a DUT. More specifically, serial encoded data is transmitted from a SERDES to a DUT, which attempts to transmit the serial encoded data back to the SERDES. The SERDES compares the output of the DUT to the input to the DUT (or what the input should have been), to establish a BER.
One of the characteristics that can adversely affect the BER is jitter. Jitter can be defined as an unwanted phase modulation of a digital signal. Jitter is comprised of random (i.e., unpredictable) jitter and deterministic jitter. Deterministic jitter is caused by process or component interactions of a system. Random jitter is typically caused by thermal (or other random) noise effects of a system that affect the phase of the clock and/or data signals. For measurements encompassing jitter, it is necessary to collect sufficient amounts of data to have a statistically valid jitter distribution. Histogram data of jitter should include, therefore, many thousands or millions of acquisitions to yield valid statistics.
Jitter performance of devices (e.g., a SERDES, a DUT) is specified in terms of jitter generation, jitter transfer, and jitter tolerance. Jitter generation can be defined as the amount of jitter added to a clock and/or data signal by a device. Jitter transfer is the amount of jitter present in a clock and/or data input signal received by a device that is transferred, by the device, to the clock and/or data output signal of the device. Jitter transfer can change with the data rate, so jitter transfer is typically expressed as the ratio of output jitter to input jitter at a specific data rate.
Jitter tolerance is defined as the ability of a device to correctly determine the value or state of a received data signal despite jitter. Jitter tolerance can be further defined as the amount of jitter in a data signal received by a device that causes, for example, the BER of the device to exceed a specified limit. Devices that process a digital signal (e.g., a DUT) must determine whether a sample, such as a voltage level, of a data signal, falls within the range of a first logic state or a second logic state (i.e. a binary one or a binary zero).
The device compares the sample to a reference value, such as a reference voltage, to determine whether the sample represents the first logic state or the second logic state. If the sample is greater than or equal to the reference value, the sample falls within the range of, for example, the first logic state. But, if the sample is less than the reference value, the sample falls within the range of the second logic state. As noted above, jitter can shift the transition between logic states. As a result, the data signal may not cross the reference value in time for the device to properly determine the intended state of the sample. When this happens, a bit error occurs. As the magnitude of jitter is increased, the incidence of a data signal not crossing the reference value in time for a device to properly determine the intended state of the sample can increase as well. In other words, as the magnitude of jitter is increased, the BER of the device may increase as well.
Another issue with optical sub-assemblies is the attenuation of the power level of an optical signal transmitted to an optical transceiver. When this occurs, a given optical transceiver may not be able to accurately determine the logic state of a given signal. Attenuation can occur because of the great lengths a signal is transmitted, faulty transmitter equipment, poor alignment between connectors, and a host of other reasons.
In the past, measuring power attenuation and jitter for a particular device, such as an optoelectronic transceiver, was a costly operation. For example, an Agilent® Digital Communication Analyzer (Serial BERT 3.6 Gb/s Bit Error Ratio Tester) which currently retails for more than ninety thousand dollars was required to take such measurements with precision comparable to that of the present invention. The AGILENT® mark is a registered mark of AGILENT TECHNOLOGIES, INC. CORPORATION DELAWARE for use in connection with optical equipment and components.